As an architecture of integrated circuits such as large-scale integration (LSI) devices, some known devices contain a plurality of master units and plurality of slave units that are connected together via a bus. Designing a circuit based on a given specification and verifying the design are part of a typical development process of integrated circuits. A circuit design may be verified in various aspects, one of which is a conflict verification that tests whether the circuit operates properly in possible conflict conditions of signals transferred through a bus. This test is achieved by causing the device under test to transfer signals between master units and slave units in various combinations.
There are several existing techniques for testing conflict in a multiprocessor system. One such technique keeps track of bus request signals from a plurality of processors to monitor how they use a common bus in the system. Another technique is to check the occurrence of conflict by using processing requests from processors. Yet another existing technique provides a conflict-prone environment by generating a pseudo request that conflicts with a real request from a processor. See, for example, the following documents:
Japanese Laid-open Patent Publication No. 63-276660
Japanese Laid-open Patent Publication No. 60-063642
Japanese Laid-open Patent Publication No. 04-184557
Test patterns (or scenarios) are designed to achieve conflict verification. In the case of an integrated circuit containing master and slave units and their bus connection, the test patterns activate two or more combinations of master and slave units in parallel, thereby producing conflict-causing conditions.
The conventional conflict verification techniques, however, only provide insufficient information about the test coverage, i.e., how thoroughly the verification test generates possible conflict conditions in the integrated circuit under test. In other words, the conventional techniques may overlook some possible conflict conditions or may needlessly repeat the same test.